My research is primarily concerned with the challenges of VLSI design, electronic design automation, computer architecture, and their interaction. These challenges essentially arise from the scaling bottleneck of “memory wall” and “power wall” faced by traditional design paradigms or implementation technology. The potential solution to these challenges, i.e. a basic principle of my research, is possibly that architecture or circuit design must put more emphasis on the optimization of data movement across the whole stack, and be ready for the shift to data-centric design philosophy. The current system, specifically the memory and interconnects sub-system, must be reshaped by two irreversible forces of different directions: emerging physical implementation technologies such as NVM and 3D-ICs, and explosion of innovative applications such as machine learning, big data and in-memory computing.
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